AI Research Engineer — Chip Design Optimisation

Ryan Ashford

Full-time · Mid-level · Los_Angeles

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About the role

We are a fabless semiconductor company. We design chips — AI accelerators, networking ASICs, and custom silicon for edge inference applications. We have 1,100 engineers across four design centres. A chip design iteration takes months. A mask set costs millions. The consequence of a bug discovered at tape-out rather than during simulation is not an inconvenience — it is an existential event for a programme. We are applying machine learning to electronic design automation to reduce the iteration time between design decisions and verified simulation results. The specific problems we are working on: floor plan optimisation using reinforcement learning, timing closure prediction, and automated bug localisation in simulation traces. These are not toy problems. They are active research questions that major EDA vendors and hyperscaler chip teams are working on simultaneously, and where the literature is advancing quickly. We are building an internal AI research team to work on these problems in the context of our own design flows and proprietary toolchains. You do not need a background in chip design — we can teach you what you need. You need a deep understanding of reinforcement learning and the engineering discipline to implement research ideas in production design tools.

Responsibilities

Research and implement reinforcement learning approaches to floor plan optimisation in our internal EDA flow
Develop ML models for timing closure prediction to identify likely violations earlier in the design cycle
Collaborate with design engineers to understand the physical constraints and cost functions that make a good chip optimisation objective
Produce rigorous experimental evaluations and written research reports on the efficacy of approaches tested
Contribute to the growing internal knowledge base on AI-assisted chip design

Requirements

4+ years of ML research engineering or applied AI research with hands-on reinforcement learning implementation experience
PyTorch for implementing RL algorithms from first principles — you understand policy gradient methods, value-based learning, and the gap between research papers and stable training
Reinforcement Learning at depth: PPO, SAC, reward shaping, and the practical challenges of exploration in large state spaces
Python at a senior research engineering level: reproducible experiments, clean implementation, and the discipline to write code that a colleague can build on
Statistics for rigorous experimental evaluation — you design experiments to test hypotheses, not to confirm what you expected
SQL for analysis of simulation trace data and design quality metrics
Curiosity about hardware design — you do not need prior EDA experience but you will need to develop enough domain intuition to formulate meaningful research questions

Benefits

$168,000 – $215,000 base salary + equity (meaningful package at our current growth stage)
Full remote — design engineers on your partner teams are distributed across the US, Europe, and Asia
$3,000 annual research and conference budget
Access to proprietary design data and internal EDA toolchains
Work on problems where a real result has a real dollar value that you can measure